mirror of
https://github.com/Ryubing/Ryujinx.git
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misc: chore: Use collection expressions in ARMeilleure
This commit is contained in:
parent
c7db948fb3
commit
9cb3b40ffc
43 changed files with 251 additions and 256 deletions
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@ -42,7 +42,7 @@ namespace ARMeilleure.CodeGen.Arm64
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{
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Offset = offset;
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Symbol = symbol;
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LdrOffsets = new List<(Operand, int)>();
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LdrOffsets = [];
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}
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}
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@ -266,7 +266,7 @@ namespace ARMeilleure.CodeGen.Arm64
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}
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else
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{
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relocInfo = new RelocInfo(Array.Empty<RelocEntry>());
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relocInfo = new RelocInfo([]);
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}
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return (code, relocInfo);
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@ -1079,7 +1079,7 @@ namespace ARMeilleure.CodeGen.Arm64
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private static UnwindInfo WritePrologue(CodeGenContext context)
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{
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List<UnwindPushEntry> pushEntries = new();
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List<UnwindPushEntry> pushEntries = [];
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Operand rsp = Register(SpRegister);
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@ -140,8 +140,8 @@ namespace ARMeilleure.CodeGen.Arm64
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return false;
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}
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private static readonly string[] _sysctlNames = new string[]
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{
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private static readonly string[] _sysctlNames =
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[
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"hw.optional.floatingpoint",
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"hw.optional.AdvSIMD",
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"hw.optional.arm.FEAT_FP16",
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@ -150,8 +150,8 @@ namespace ARMeilleure.CodeGen.Arm64
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"hw.optional.arm.FEAT_LSE",
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"hw.optional.armv8_crc32",
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"hw.optional.arm.FEAT_SHA1",
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"hw.optional.arm.FEAT_SHA256",
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};
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"hw.optional.arm.FEAT_SHA256"
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];
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[Flags]
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public enum MacOsFeatureFlags
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@ -261,10 +261,10 @@ namespace ARMeilleure.CodeGen.Arm64
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Operand dest = operation.Destination;
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List<Operand> sources = new()
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{
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operation.GetSource(0),
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};
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List<Operand> sources =
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[
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operation.GetSource(0)
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];
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int argsCount = operation.SourcesCount - 1;
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@ -365,10 +365,10 @@ namespace ARMeilleure.CodeGen.Arm64
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Operation node,
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Operation operation)
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{
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List<Operand> sources = new()
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{
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operation.GetSource(0),
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};
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List<Operand> sources =
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[
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operation.GetSource(0)
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];
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int argsCount = operation.SourcesCount - 1;
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@ -468,8 +468,8 @@ namespace ARMeilleure.CodeGen.Arm64
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// Update the sources and destinations with split 64-bit halfs of the whole 128-bit values.
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// We also need a additional registers that will be used to store temporary information.
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operation.SetDestinations(new[] { actualLow, actualHigh, Local(OperandType.I64), Local(OperandType.I64) });
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operation.SetSources(new[] { address, expectedLow, expectedHigh, desiredLow, desiredHigh });
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operation.SetDestinations([actualLow, actualHigh, Local(OperandType.I64), Local(OperandType.I64)]);
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operation.SetSources([address, expectedLow, expectedHigh, desiredLow, desiredHigh]);
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// Add some dummy uses of the input operands, as the CAS operation will be a loop,
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// so they can't be used as destination operand.
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@ -486,7 +486,7 @@ namespace ARMeilleure.CodeGen.Arm64
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else
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{
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// We need a additional register where the store result will be written to.
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node.SetDestinations(new[] { node.Destination, Local(OperandType.I32) });
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node.SetDestinations([node.Destination, Local(OperandType.I32)]);
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// Add some dummy uses of the input operands, as the CAS operation will be a loop,
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// so they can't be used as destination operand.
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@ -31,7 +31,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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public ParallelCopy()
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{
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_copies = new List<Copy>();
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_copies = [];
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}
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public void AddCopy(Register dest, Register source, OperandType type)
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@ -218,7 +218,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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public Operation[] Sequence()
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{
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List<Operation> sequence = new();
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List<Operation> sequence = [];
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if (_spillQueue != null)
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{
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@ -799,8 +799,8 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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private void NumberLocals(ControlFlowGraph cfg, int registersCount)
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{
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_operationNodes = new List<(IntrusiveList<Operation>, Operation)>();
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_intervals = new List<LiveInterval>();
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_operationNodes = [];
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_intervals = [];
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for (int index = 0; index < registersCount; index++)
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{
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@ -980,7 +980,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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_blockLiveIn = blkLiveIn;
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_blockEdges = new HashSet<int>();
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_blockEdges = [];
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// Compute lifetime intervals.
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int operationPos = _operationsCount;
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@ -75,9 +75,9 @@ namespace ARMeilleure.CodeGen.X86
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{
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_stream = stream;
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_labels = new Dictionary<Operand, long>();
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_jumps = new List<Jump>();
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_jumps = [];
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_relocs = relocatable ? new List<Reloc>() : null;
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_relocs = relocatable ? [] : null;
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}
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public void MarkLabel(Operand label)
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@ -1419,7 +1419,7 @@ namespace ARMeilleure.CodeGen.X86
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int relocOffset = 0;
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RelocEntry[] relocEntries = hasRelocs
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? new RelocEntry[relocs.Length]
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: Array.Empty<RelocEntry>();
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: [];
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for (int i = 0; i < jumps.Length; i++)
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{
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@ -1748,7 +1748,7 @@ namespace ARMeilleure.CodeGen.X86
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private static UnwindInfo WritePrologue(CodeGenContext context)
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{
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List<UnwindPushEntry> pushEntries = new();
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List<UnwindPushEntry> pushEntries = [];
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Operand rsp = Register(X86Register.Rsp);
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@ -40,12 +40,12 @@ namespace ARMeilleure.CodeGen.X86
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return 0;
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}
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ReadOnlySpan<byte> asmGetXcr0 = new byte[]
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{
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ReadOnlySpan<byte> asmGetXcr0 =
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[
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0x31, 0xc9, // xor ecx, ecx
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0xf, 0x01, 0xd0, // xgetbv
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0xc3, // ret
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};
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0xc3 // ret
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];
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using MemoryBlock memGetXcr0 = new((ulong)asmGetXcr0.Length);
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@ -124,13 +124,13 @@ namespace ARMeilleure.CodeGen.X86
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{
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int stackOffset = stackAlloc.Allocate(OperandType.I32);
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node.SetSources(new Operand[] { Const(stackOffset), node.GetSource(0) });
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node.SetSources([Const(stackOffset), node.GetSource(0)]);
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}
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else if (node.Intrinsic == Intrinsic.X86Stmxcsr)
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{
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int stackOffset = stackAlloc.Allocate(OperandType.I32);
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node.SetSources(new Operand[] { Const(stackOffset) });
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node.SetSources([Const(stackOffset)]);
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}
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break;
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}
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@ -253,8 +253,8 @@ namespace ARMeilleure.CodeGen.X86
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node = nodes.AddAfter(node, Operation(Instruction.VectorCreateScalar, dest, rax));
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nodes.AddAfter(node, Operation(Instruction.VectorInsert, dest, dest, rdx, Const(1)));
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operation.SetDestinations(new Operand[] { rdx, rax });
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operation.SetSources(new Operand[] { operation.GetSource(0), rdx, rax, rcx, rbx });
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operation.SetDestinations([rdx, rax]);
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operation.SetSources([operation.GetSource(0), rdx, rax, rcx, rbx]);
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}
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else
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{
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@ -274,7 +274,7 @@ namespace ARMeilleure.CodeGen.X86
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nodes.AddBefore(node, Operation(Instruction.Copy, temp, newValue));
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node.SetSources(new Operand[] { node.GetSource(0), rax, temp });
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node.SetSources([node.GetSource(0), rax, temp]);
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nodes.AddAfter(node, Operation(Instruction.Copy, dest, rax));
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@ -303,7 +303,7 @@ namespace ARMeilleure.CodeGen.X86
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nodes.AddAfter(node, Operation(Instruction.Copy, dest, rax));
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node.SetSources(new Operand[] { rdx, rax, node.GetSource(1) });
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node.SetSources([rdx, rax, node.GetSource(1)]);
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node.Destination = rax;
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}
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@ -348,7 +348,7 @@ namespace ARMeilleure.CodeGen.X86
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nodes.AddAfter(node, Operation(Instruction.Copy, dest, rdx));
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node.SetDestinations(new Operand[] { rdx, rax });
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node.SetDestinations([rdx, rax]);
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break;
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}
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@ -14,10 +14,10 @@ namespace ARMeilleure.CodeGen.X86
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{
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Operand dest = node.Destination;
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List<Operand> sources = new()
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{
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node.GetSource(0),
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};
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List<Operand> sources =
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[
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node.GetSource(0)
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];
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int argsCount = node.SourcesCount - 1;
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@ -117,10 +117,10 @@ namespace ARMeilleure.CodeGen.X86
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public static void InsertTailcallCopies(IntrusiveList<Operation> nodes, Operation node)
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{
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List<Operand> sources = new()
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{
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node.GetSource(0),
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};
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List<Operand> sources =
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[
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node.GetSource(0)
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];
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int argsCount = node.SourcesCount - 1;
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@ -321,7 +321,7 @@ namespace ARMeilleure.CodeGen.X86
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nodes.AddBefore(node, retCopyOp);
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}
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node.SetSources(Array.Empty<Operand>());
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node.SetSources([]);
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}
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}
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}
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@ -3,52 +3,46 @@ namespace ARMeilleure.Common
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public static class AddressTablePresets
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{
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private static readonly AddressTableLevel[] _levels64Bit =
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new AddressTableLevel[]
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{
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new(31, 17),
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[
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new(31, 17),
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new(23, 8),
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new(15, 8),
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new( 7, 8),
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new( 2, 5),
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};
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new( 2, 5)
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];
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private static readonly AddressTableLevel[] _levels32Bit =
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new AddressTableLevel[]
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{
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new(31, 17),
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[
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new(31, 17),
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new(23, 8),
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new(15, 8),
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new( 7, 8),
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new( 1, 6),
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};
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new( 1, 6)
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];
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private static readonly AddressTableLevel[] _levels64BitSparseTiny =
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new AddressTableLevel[]
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{
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new( 11, 28),
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new( 2, 9),
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};
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[
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new( 11, 28),
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new( 2, 9)
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];
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private static readonly AddressTableLevel[] _levels32BitSparseTiny =
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new AddressTableLevel[]
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{
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new( 10, 22),
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new( 1, 9),
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};
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[
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new( 10, 22),
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new( 1, 9)
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];
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private static readonly AddressTableLevel[] _levels64BitSparseGiant =
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new AddressTableLevel[]
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{
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new( 38, 1),
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new( 2, 36),
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};
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[
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new( 38, 1),
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new( 2, 36)
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];
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private static readonly AddressTableLevel[] _levels32BitSparseGiant =
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new AddressTableLevel[]
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{
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new( 31, 1),
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new( 1, 30),
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};
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[
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new( 31, 1),
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new( 1, 30)
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];
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//high power will run worse on DDR3 systems and some DDR4 systems due to the higher ram utilization
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//low power will never run worse than non-sparse, but for most systems it won't be necessary
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@ -5,7 +5,7 @@ namespace ARMeilleure.Common
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{
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static class BitUtils
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{
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private static ReadOnlySpan<sbyte> HbsNibbleLut => new sbyte[] { -1, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3 };
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private static ReadOnlySpan<sbyte> HbsNibbleLut => [-1, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3];
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public static long FillWithOnes(int bits)
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{
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@ -17,7 +17,7 @@ namespace ARMeilleure.Decoders
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public Block()
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{
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OpCodes = new List<OpCode>();
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OpCodes = [];
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}
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public Block(ulong address) : this()
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@ -20,7 +20,7 @@ namespace ARMeilleure.Decoders
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public static Block[] Decode(IMemoryManager memory, ulong address, ExecutionMode mode, bool highCq, DecoderMode dMode)
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{
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List<Block> blocks = new();
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List<Block> blocks = [];
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Queue<Block> workQueue = new();
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|
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@ -5,12 +5,12 @@ namespace ARMeilleure.Decoders
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class OpCode32SimdMemPair : OpCode32, IOpCode32Simd
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{
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private static readonly int[] _regsMap =
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{
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[
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1, 1, 4, 2,
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1, 1, 3, 1,
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1, 1, 2, 1,
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1, 1, 1, 1,
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};
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1, 1, 1, 1
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];
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public int Vd { get; }
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public int Rn { get; }
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@ -12,7 +12,7 @@ namespace ARMeilleure.Decoders
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public OpCodeT16IfThen(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
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{
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List<Condition> conds = new();
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List<Condition> conds = [];
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int cond = (opCode >> 4) & 0xf;
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int mask = opCode & 0xf;
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@ -29,9 +29,9 @@ namespace ARMeilleure.Decoders
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}
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}
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private static readonly List<InstInfo> _allInstA32 = new();
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private static readonly List<InstInfo> _allInstT32 = new();
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private static readonly List<InstInfo> _allInstA64 = new();
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private static readonly List<InstInfo> _allInstA32 = [];
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private static readonly List<InstInfo> _allInstT32 = [];
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private static readonly List<InstInfo> _allInstA64 = [];
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private static readonly InstInfo[][] _instA32FastLookup = new InstInfo[FastLookupSize][];
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private static readonly InstInfo[][] _instT32FastLookup = new InstInfo[FastLookupSize][];
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@ -1330,7 +1330,7 @@ namespace ARMeilleure.Decoders
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for (int index = 0; index < temp.Length; index++)
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{
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temp[index] = new List<InstInfo>();
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temp[index] = [];
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}
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foreach (InstInfo inst in allInsts)
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|
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@ -29,7 +29,7 @@ namespace ARMeilleure.Diagnostics
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static Symbols()
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{
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_symbols = new ConcurrentDictionary<ulong, string>();
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_rangedSymbols = new List<RangedSymbol>();
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_rangedSymbols = [];
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}
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public static string Get(ulong address)
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|
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@ -9,8 +9,8 @@ namespace ARMeilleure.Instructions
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{
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#region "LookUp Tables"
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#pragma warning disable IDE1006 // Naming rule violation
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private static ReadOnlySpan<byte> _sBox => new byte[]
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{
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private static ReadOnlySpan<byte> _sBox =>
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[
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0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
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0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
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0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
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@ -26,11 +26,11 @@ namespace ARMeilleure.Instructions
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0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
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0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
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0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
|
||||
0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16,
|
||||
};
|
||||
0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
|
||||
];
|
||||
|
||||
private static ReadOnlySpan<byte> _invSBox => new byte[]
|
||||
{
|
||||
private static ReadOnlySpan<byte> _invSBox =>
|
||||
[
|
||||
0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb,
|
||||
0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87, 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb,
|
||||
0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d, 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e,
|
||||
|
@ -46,11 +46,11 @@ namespace ARMeilleure.Instructions
|
|||
0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f,
|
||||
0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d, 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef,
|
||||
0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0, 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61,
|
||||
0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d,
|
||||
};
|
||||
0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d
|
||||
];
|
||||
|
||||
private static ReadOnlySpan<byte> _gfMul02 => new byte[]
|
||||
{
|
||||
private static ReadOnlySpan<byte> _gfMul02 =>
|
||||
[
|
||||
0x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e, 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e,
|
||||
0x20, 0x22, 0x24, 0x26, 0x28, 0x2a, 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x3a, 0x3c, 0x3e,
|
||||
0x40, 0x42, 0x44, 0x46, 0x48, 0x4a, 0x4c, 0x4e, 0x50, 0x52, 0x54, 0x56, 0x58, 0x5a, 0x5c, 0x5e,
|
||||
|
@ -66,11 +66,11 @@ namespace ARMeilleure.Instructions
|
|||
0x9b, 0x99, 0x9f, 0x9d, 0x93, 0x91, 0x97, 0x95, 0x8b, 0x89, 0x8f, 0x8d, 0x83, 0x81, 0x87, 0x85,
|
||||
0xbb, 0xb9, 0xbf, 0xbd, 0xb3, 0xb1, 0xb7, 0xb5, 0xab, 0xa9, 0xaf, 0xad, 0xa3, 0xa1, 0xa7, 0xa5,
|
||||
0xdb, 0xd9, 0xdf, 0xdd, 0xd3, 0xd1, 0xd7, 0xd5, 0xcb, 0xc9, 0xcf, 0xcd, 0xc3, 0xc1, 0xc7, 0xc5,
|
||||
0xfb, 0xf9, 0xff, 0xfd, 0xf3, 0xf1, 0xf7, 0xf5, 0xeb, 0xe9, 0xef, 0xed, 0xe3, 0xe1, 0xe7, 0xe5,
|
||||
};
|
||||
0xfb, 0xf9, 0xff, 0xfd, 0xf3, 0xf1, 0xf7, 0xf5, 0xeb, 0xe9, 0xef, 0xed, 0xe3, 0xe1, 0xe7, 0xe5
|
||||
];
|
||||
|
||||
private static ReadOnlySpan<byte> _gfMul03 => new byte[]
|
||||
{
|
||||
private static ReadOnlySpan<byte> _gfMul03 =>
|
||||
[
|
||||
0x00, 0x03, 0x06, 0x05, 0x0c, 0x0f, 0x0a, 0x09, 0x18, 0x1b, 0x1e, 0x1d, 0x14, 0x17, 0x12, 0x11,
|
||||
0x30, 0x33, 0x36, 0x35, 0x3c, 0x3f, 0x3a, 0x39, 0x28, 0x2b, 0x2e, 0x2d, 0x24, 0x27, 0x22, 0x21,
|
||||
0x60, 0x63, 0x66, 0x65, 0x6c, 0x6f, 0x6a, 0x69, 0x78, 0x7b, 0x7e, 0x7d, 0x74, 0x77, 0x72, 0x71,
|
||||
|
@ -86,11 +86,11 @@ namespace ARMeilleure.Instructions
|
|||
0x5b, 0x58, 0x5d, 0x5e, 0x57, 0x54, 0x51, 0x52, 0x43, 0x40, 0x45, 0x46, 0x4f, 0x4c, 0x49, 0x4a,
|
||||
0x6b, 0x68, 0x6d, 0x6e, 0x67, 0x64, 0x61, 0x62, 0x73, 0x70, 0x75, 0x76, 0x7f, 0x7c, 0x79, 0x7a,
|
||||
0x3b, 0x38, 0x3d, 0x3e, 0x37, 0x34, 0x31, 0x32, 0x23, 0x20, 0x25, 0x26, 0x2f, 0x2c, 0x29, 0x2a,
|
||||
0x0b, 0x08, 0x0d, 0x0e, 0x07, 0x04, 0x01, 0x02, 0x13, 0x10, 0x15, 0x16, 0x1f, 0x1c, 0x19, 0x1a,
|
||||
};
|
||||
0x0b, 0x08, 0x0d, 0x0e, 0x07, 0x04, 0x01, 0x02, 0x13, 0x10, 0x15, 0x16, 0x1f, 0x1c, 0x19, 0x1a
|
||||
];
|
||||
|
||||
private static ReadOnlySpan<byte> _gfMul09 => new byte[]
|
||||
{
|
||||
private static ReadOnlySpan<byte> _gfMul09 =>
|
||||
[
|
||||
0x00, 0x09, 0x12, 0x1b, 0x24, 0x2d, 0x36, 0x3f, 0x48, 0x41, 0x5a, 0x53, 0x6c, 0x65, 0x7e, 0x77,
|
||||
0x90, 0x99, 0x82, 0x8b, 0xb4, 0xbd, 0xa6, 0xaf, 0xd8, 0xd1, 0xca, 0xc3, 0xfc, 0xf5, 0xee, 0xe7,
|
||||
0x3b, 0x32, 0x29, 0x20, 0x1f, 0x16, 0x0d, 0x04, 0x73, 0x7a, 0x61, 0x68, 0x57, 0x5e, 0x45, 0x4c,
|
||||
|
@ -106,11 +106,11 @@ namespace ARMeilleure.Instructions
|
|||
0x9a, 0x93, 0x88, 0x81, 0xbe, 0xb7, 0xac, 0xa5, 0xd2, 0xdb, 0xc0, 0xc9, 0xf6, 0xff, 0xe4, 0xed,
|
||||
0x0a, 0x03, 0x18, 0x11, 0x2e, 0x27, 0x3c, 0x35, 0x42, 0x4b, 0x50, 0x59, 0x66, 0x6f, 0x74, 0x7d,
|
||||
0xa1, 0xa8, 0xb3, 0xba, 0x85, 0x8c, 0x97, 0x9e, 0xe9, 0xe0, 0xfb, 0xf2, 0xcd, 0xc4, 0xdf, 0xd6,
|
||||
0x31, 0x38, 0x23, 0x2a, 0x15, 0x1c, 0x07, 0x0e, 0x79, 0x70, 0x6b, 0x62, 0x5d, 0x54, 0x4f, 0x46,
|
||||
};
|
||||
0x31, 0x38, 0x23, 0x2a, 0x15, 0x1c, 0x07, 0x0e, 0x79, 0x70, 0x6b, 0x62, 0x5d, 0x54, 0x4f, 0x46
|
||||
];
|
||||
|
||||
private static ReadOnlySpan<byte> _gfMul0B => new byte[]
|
||||
{
|
||||
private static ReadOnlySpan<byte> _gfMul0B =>
|
||||
[
|
||||
0x00, 0x0b, 0x16, 0x1d, 0x2c, 0x27, 0x3a, 0x31, 0x58, 0x53, 0x4e, 0x45, 0x74, 0x7f, 0x62, 0x69,
|
||||
0xb0, 0xbb, 0xa6, 0xad, 0x9c, 0x97, 0x8a, 0x81, 0xe8, 0xe3, 0xfe, 0xf5, 0xc4, 0xcf, 0xd2, 0xd9,
|
||||
0x7b, 0x70, 0x6d, 0x66, 0x57, 0x5c, 0x41, 0x4a, 0x23, 0x28, 0x35, 0x3e, 0x0f, 0x04, 0x19, 0x12,
|
||||
|
@ -126,11 +126,11 @@ namespace ARMeilleure.Instructions
|
|||
0x01, 0x0a, 0x17, 0x1c, 0x2d, 0x26, 0x3b, 0x30, 0x59, 0x52, 0x4f, 0x44, 0x75, 0x7e, 0x63, 0x68,
|
||||
0xb1, 0xba, 0xa7, 0xac, 0x9d, 0x96, 0x8b, 0x80, 0xe9, 0xe2, 0xff, 0xf4, 0xc5, 0xce, 0xd3, 0xd8,
|
||||
0x7a, 0x71, 0x6c, 0x67, 0x56, 0x5d, 0x40, 0x4b, 0x22, 0x29, 0x34, 0x3f, 0x0e, 0x05, 0x18, 0x13,
|
||||
0xca, 0xc1, 0xdc, 0xd7, 0xe6, 0xed, 0xf0, 0xfb, 0x92, 0x99, 0x84, 0x8f, 0xbe, 0xb5, 0xa8, 0xa3,
|
||||
};
|
||||
0xca, 0xc1, 0xdc, 0xd7, 0xe6, 0xed, 0xf0, 0xfb, 0x92, 0x99, 0x84, 0x8f, 0xbe, 0xb5, 0xa8, 0xa3
|
||||
];
|
||||
|
||||
private static ReadOnlySpan<byte> _gfMul0D => new byte[]
|
||||
{
|
||||
private static ReadOnlySpan<byte> _gfMul0D =>
|
||||
[
|
||||
0x00, 0x0d, 0x1a, 0x17, 0x34, 0x39, 0x2e, 0x23, 0x68, 0x65, 0x72, 0x7f, 0x5c, 0x51, 0x46, 0x4b,
|
||||
0xd0, 0xdd, 0xca, 0xc7, 0xe4, 0xe9, 0xfe, 0xf3, 0xb8, 0xb5, 0xa2, 0xaf, 0x8c, 0x81, 0x96, 0x9b,
|
||||
0xbb, 0xb6, 0xa1, 0xac, 0x8f, 0x82, 0x95, 0x98, 0xd3, 0xde, 0xc9, 0xc4, 0xe7, 0xea, 0xfd, 0xf0,
|
||||
|
@ -146,11 +146,11 @@ namespace ARMeilleure.Instructions
|
|||
0xb7, 0xba, 0xad, 0xa0, 0x83, 0x8e, 0x99, 0x94, 0xdf, 0xd2, 0xc5, 0xc8, 0xeb, 0xe6, 0xf1, 0xfc,
|
||||
0x67, 0x6a, 0x7d, 0x70, 0x53, 0x5e, 0x49, 0x44, 0x0f, 0x02, 0x15, 0x18, 0x3b, 0x36, 0x21, 0x2c,
|
||||
0x0c, 0x01, 0x16, 0x1b, 0x38, 0x35, 0x22, 0x2f, 0x64, 0x69, 0x7e, 0x73, 0x50, 0x5d, 0x4a, 0x47,
|
||||
0xdc, 0xd1, 0xc6, 0xcb, 0xe8, 0xe5, 0xf2, 0xff, 0xb4, 0xb9, 0xae, 0xa3, 0x80, 0x8d, 0x9a, 0x97,
|
||||
};
|
||||
0xdc, 0xd1, 0xc6, 0xcb, 0xe8, 0xe5, 0xf2, 0xff, 0xb4, 0xb9, 0xae, 0xa3, 0x80, 0x8d, 0x9a, 0x97
|
||||
];
|
||||
|
||||
private static ReadOnlySpan<byte> _gfMul0E => new byte[]
|
||||
{
|
||||
private static ReadOnlySpan<byte> _gfMul0E =>
|
||||
[
|
||||
0x00, 0x0e, 0x1c, 0x12, 0x38, 0x36, 0x24, 0x2a, 0x70, 0x7e, 0x6c, 0x62, 0x48, 0x46, 0x54, 0x5a,
|
||||
0xe0, 0xee, 0xfc, 0xf2, 0xd8, 0xd6, 0xc4, 0xca, 0x90, 0x9e, 0x8c, 0x82, 0xa8, 0xa6, 0xb4, 0xba,
|
||||
0xdb, 0xd5, 0xc7, 0xc9, 0xe3, 0xed, 0xff, 0xf1, 0xab, 0xa5, 0xb7, 0xb9, 0x93, 0x9d, 0x8f, 0x81,
|
||||
|
@ -166,18 +166,18 @@ namespace ARMeilleure.Instructions
|
|||
0xec, 0xe2, 0xf0, 0xfe, 0xd4, 0xda, 0xc8, 0xc6, 0x9c, 0x92, 0x80, 0x8e, 0xa4, 0xaa, 0xb8, 0xb6,
|
||||
0x0c, 0x02, 0x10, 0x1e, 0x34, 0x3a, 0x28, 0x26, 0x7c, 0x72, 0x60, 0x6e, 0x44, 0x4a, 0x58, 0x56,
|
||||
0x37, 0x39, 0x2b, 0x25, 0x0f, 0x01, 0x13, 0x1d, 0x47, 0x49, 0x5b, 0x55, 0x7f, 0x71, 0x63, 0x6d,
|
||||
0xd7, 0xd9, 0xcb, 0xc5, 0xef, 0xe1, 0xf3, 0xfd, 0xa7, 0xa9, 0xbb, 0xb5, 0x9f, 0x91, 0x83, 0x8d,
|
||||
};
|
||||
0xd7, 0xd9, 0xcb, 0xc5, 0xef, 0xe1, 0xf3, 0xfd, 0xa7, 0xa9, 0xbb, 0xb5, 0x9f, 0x91, 0x83, 0x8d
|
||||
];
|
||||
|
||||
private static ReadOnlySpan<byte> _srPerm => new byte[]
|
||||
{
|
||||
0, 13, 10, 7, 4, 1, 14, 11, 8, 5, 2, 15, 12, 9, 6, 3,
|
||||
};
|
||||
private static ReadOnlySpan<byte> _srPerm =>
|
||||
[
|
||||
0, 13, 10, 7, 4, 1, 14, 11, 8, 5, 2, 15, 12, 9, 6, 3
|
||||
];
|
||||
|
||||
private static ReadOnlySpan<byte> _isrPerm => new byte[]
|
||||
{
|
||||
0, 5, 10, 15, 4, 9, 14, 3, 8, 13, 2, 7, 12, 1, 6, 11,
|
||||
};
|
||||
private static ReadOnlySpan<byte> _isrPerm =>
|
||||
[
|
||||
0, 5, 10, 15, 4, 9, 14, 3, 8, 13, 2, 7, 12, 1, 6, 11
|
||||
];
|
||||
#pragma warning restore IDE1006
|
||||
#endregion
|
||||
|
||||
|
|
|
@ -245,8 +245,8 @@ namespace ARMeilleure.Instructions
|
|||
string name = nameof(Math.Round);
|
||||
|
||||
MethodInfo info = (op.Size & 1) == 0
|
||||
? typeof(MathF).GetMethod(name, new Type[] { typeof(float), typeof(MidpointRounding) })
|
||||
: typeof(Math).GetMethod(name, new Type[] { typeof(double), typeof(MidpointRounding) });
|
||||
? typeof(MathF).GetMethod(name, [typeof(float), typeof(MidpointRounding)])
|
||||
: typeof(Math).GetMethod(name, [typeof(double), typeof(MidpointRounding)]);
|
||||
|
||||
return context.Call(info, n, Const((int)roundMode));
|
||||
}
|
||||
|
|
|
@ -18,19 +18,19 @@ namespace ARMeilleure.Instructions
|
|||
static class InstEmitSimdHelper
|
||||
{
|
||||
#region "Masks"
|
||||
public static readonly long[] EvenMasks = new long[]
|
||||
{
|
||||
public static readonly long[] EvenMasks =
|
||||
[
|
||||
14L << 56 | 12L << 48 | 10L << 40 | 08L << 32 | 06L << 24 | 04L << 16 | 02L << 8 | 00L << 0, // B
|
||||
13L << 56 | 12L << 48 | 09L << 40 | 08L << 32 | 05L << 24 | 04L << 16 | 01L << 8 | 00L << 0, // H
|
||||
11L << 56 | 10L << 48 | 09L << 40 | 08L << 32 | 03L << 24 | 02L << 16 | 01L << 8 | 00L << 0, // S
|
||||
};
|
||||
11L << 56 | 10L << 48 | 09L << 40 | 08L << 32 | 03L << 24 | 02L << 16 | 01L << 8 | 00L << 0 // S
|
||||
];
|
||||
|
||||
public static readonly long[] OddMasks = new long[]
|
||||
{
|
||||
public static readonly long[] OddMasks =
|
||||
[
|
||||
15L << 56 | 13L << 48 | 11L << 40 | 09L << 32 | 07L << 24 | 05L << 16 | 03L << 8 | 01L << 0, // B
|
||||
15L << 56 | 14L << 48 | 11L << 40 | 10L << 32 | 07L << 24 | 06L << 16 | 03L << 8 | 02L << 0, // H
|
||||
15L << 56 | 14L << 48 | 13L << 40 | 12L << 32 | 07L << 24 | 06L << 16 | 05L << 8 | 04L << 0, // S
|
||||
};
|
||||
15L << 56 | 14L << 48 | 13L << 40 | 12L << 32 | 07L << 24 | 06L << 16 | 05L << 8 | 04L << 0 // S
|
||||
];
|
||||
|
||||
public const long ZeroMask = 128L << 56 | 128L << 48 | 128L << 40 | 128L << 32 | 128L << 24 | 128L << 16 | 128L << 8 | 128L << 0;
|
||||
|
||||
|
@ -44,118 +44,118 @@ namespace ARMeilleure.Instructions
|
|||
#endregion
|
||||
|
||||
#region "X86 SSE Intrinsics"
|
||||
public static readonly Intrinsic[] X86PaddInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PaddInstruction =
|
||||
[
|
||||
Intrinsic.X86Paddb,
|
||||
Intrinsic.X86Paddw,
|
||||
Intrinsic.X86Paddd,
|
||||
Intrinsic.X86Paddq,
|
||||
};
|
||||
Intrinsic.X86Paddq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PcmpeqInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PcmpeqInstruction =
|
||||
[
|
||||
Intrinsic.X86Pcmpeqb,
|
||||
Intrinsic.X86Pcmpeqw,
|
||||
Intrinsic.X86Pcmpeqd,
|
||||
Intrinsic.X86Pcmpeqq,
|
||||
};
|
||||
Intrinsic.X86Pcmpeqq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PcmpgtInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PcmpgtInstruction =
|
||||
[
|
||||
Intrinsic.X86Pcmpgtb,
|
||||
Intrinsic.X86Pcmpgtw,
|
||||
Intrinsic.X86Pcmpgtd,
|
||||
Intrinsic.X86Pcmpgtq,
|
||||
};
|
||||
Intrinsic.X86Pcmpgtq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PmaxsInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PmaxsInstruction =
|
||||
[
|
||||
Intrinsic.X86Pmaxsb,
|
||||
Intrinsic.X86Pmaxsw,
|
||||
Intrinsic.X86Pmaxsd,
|
||||
};
|
||||
Intrinsic.X86Pmaxsd
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PmaxuInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PmaxuInstruction =
|
||||
[
|
||||
Intrinsic.X86Pmaxub,
|
||||
Intrinsic.X86Pmaxuw,
|
||||
Intrinsic.X86Pmaxud,
|
||||
};
|
||||
Intrinsic.X86Pmaxud
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PminsInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PminsInstruction =
|
||||
[
|
||||
Intrinsic.X86Pminsb,
|
||||
Intrinsic.X86Pminsw,
|
||||
Intrinsic.X86Pminsd,
|
||||
};
|
||||
Intrinsic.X86Pminsd
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PminuInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PminuInstruction =
|
||||
[
|
||||
Intrinsic.X86Pminub,
|
||||
Intrinsic.X86Pminuw,
|
||||
Intrinsic.X86Pminud,
|
||||
};
|
||||
Intrinsic.X86Pminud
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PmovsxInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PmovsxInstruction =
|
||||
[
|
||||
Intrinsic.X86Pmovsxbw,
|
||||
Intrinsic.X86Pmovsxwd,
|
||||
Intrinsic.X86Pmovsxdq,
|
||||
};
|
||||
Intrinsic.X86Pmovsxdq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PmovzxInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PmovzxInstruction =
|
||||
[
|
||||
Intrinsic.X86Pmovzxbw,
|
||||
Intrinsic.X86Pmovzxwd,
|
||||
Intrinsic.X86Pmovzxdq,
|
||||
};
|
||||
Intrinsic.X86Pmovzxdq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PsllInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PsllInstruction =
|
||||
[
|
||||
0,
|
||||
Intrinsic.X86Psllw,
|
||||
Intrinsic.X86Pslld,
|
||||
Intrinsic.X86Psllq,
|
||||
};
|
||||
Intrinsic.X86Psllq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PsraInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PsraInstruction =
|
||||
[
|
||||
0,
|
||||
Intrinsic.X86Psraw,
|
||||
Intrinsic.X86Psrad,
|
||||
};
|
||||
Intrinsic.X86Psrad
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PsrlInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PsrlInstruction =
|
||||
[
|
||||
0,
|
||||
Intrinsic.X86Psrlw,
|
||||
Intrinsic.X86Psrld,
|
||||
Intrinsic.X86Psrlq,
|
||||
};
|
||||
Intrinsic.X86Psrlq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PsubInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PsubInstruction =
|
||||
[
|
||||
Intrinsic.X86Psubb,
|
||||
Intrinsic.X86Psubw,
|
||||
Intrinsic.X86Psubd,
|
||||
Intrinsic.X86Psubq,
|
||||
};
|
||||
Intrinsic.X86Psubq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PunpckhInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PunpckhInstruction =
|
||||
[
|
||||
Intrinsic.X86Punpckhbw,
|
||||
Intrinsic.X86Punpckhwd,
|
||||
Intrinsic.X86Punpckhdq,
|
||||
Intrinsic.X86Punpckhqdq,
|
||||
};
|
||||
Intrinsic.X86Punpckhqdq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PunpcklInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PunpcklInstruction =
|
||||
[
|
||||
Intrinsic.X86Punpcklbw,
|
||||
Intrinsic.X86Punpcklwd,
|
||||
Intrinsic.X86Punpckldq,
|
||||
Intrinsic.X86Punpcklqdq,
|
||||
};
|
||||
Intrinsic.X86Punpcklqdq
|
||||
];
|
||||
#endregion
|
||||
|
||||
public static void EnterArmFpMode(EmitterContext context, Func<FPState, Operand> getFpFlag)
|
||||
|
@ -460,8 +460,8 @@ namespace ARMeilleure.Instructions
|
|||
IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
|
||||
|
||||
MethodInfo info = (op.Size & 1) == 0
|
||||
? typeof(MathHelperF).GetMethod(name, new Type[] { typeof(float) })
|
||||
: typeof(MathHelper).GetMethod(name, new Type[] { typeof(double) });
|
||||
? typeof(MathHelperF).GetMethod(name, [typeof(float)])
|
||||
: typeof(MathHelper).GetMethod(name, [typeof(double)]);
|
||||
|
||||
return context.Call(info, n);
|
||||
}
|
||||
|
@ -473,8 +473,8 @@ namespace ARMeilleure.Instructions
|
|||
string name = nameof(MathHelper.Round);
|
||||
|
||||
MethodInfo info = (op.Size & 1) == 0
|
||||
? typeof(MathHelperF).GetMethod(name, new Type[] { typeof(float), typeof(int) })
|
||||
: typeof(MathHelper).GetMethod(name, new Type[] { typeof(double), typeof(int) });
|
||||
? typeof(MathHelperF).GetMethod(name, [typeof(float), typeof(int)])
|
||||
: typeof(MathHelper).GetMethod(name, [typeof(double), typeof(int)]);
|
||||
|
||||
return context.Call(info, n, Const((int)roundMode));
|
||||
}
|
||||
|
|
|
@ -12,17 +12,17 @@ namespace ARMeilleure.Instructions
|
|||
static partial class InstEmit
|
||||
{
|
||||
#region "Masks"
|
||||
private static readonly long[] _masksE0_Uzp = new long[]
|
||||
{
|
||||
private static readonly long[] _masksE0_Uzp =
|
||||
[
|
||||
13L << 56 | 09L << 48 | 05L << 40 | 01L << 32 | 12L << 24 | 08L << 16 | 04L << 8 | 00L << 0,
|
||||
11L << 56 | 10L << 48 | 03L << 40 | 02L << 32 | 09L << 24 | 08L << 16 | 01L << 8 | 00L << 0,
|
||||
};
|
||||
11L << 56 | 10L << 48 | 03L << 40 | 02L << 32 | 09L << 24 | 08L << 16 | 01L << 8 | 00L << 0
|
||||
];
|
||||
|
||||
private static readonly long[] _masksE1_Uzp = new long[]
|
||||
{
|
||||
private static readonly long[] _masksE1_Uzp =
|
||||
[
|
||||
15L << 56 | 11L << 48 | 07L << 40 | 03L << 32 | 14L << 24 | 10L << 16 | 06L << 8 | 02L << 0,
|
||||
15L << 56 | 14L << 48 | 07L << 40 | 06L << 32 | 13L << 24 | 12L << 16 | 05L << 8 | 04L << 0,
|
||||
};
|
||||
15L << 56 | 14L << 48 | 07L << 40 | 06L << 32 | 13L << 24 | 12L << 16 | 05L << 8 | 04L << 0
|
||||
];
|
||||
#endregion
|
||||
|
||||
public static void Dup_Gp(ArmEmitterContext context)
|
||||
|
@ -601,7 +601,7 @@ namespace ARMeilleure.Instructions
|
|||
{
|
||||
Operand d = GetVec(op.Rd);
|
||||
|
||||
List<Operand> args = new();
|
||||
List<Operand> args = [];
|
||||
|
||||
if (!isTbl)
|
||||
{
|
||||
|
|
|
@ -13,17 +13,17 @@ namespace ARMeilleure.Instructions
|
|||
{
|
||||
#region "Masks"
|
||||
// Same as InstEmitSimdMove, as the instructions do the same thing.
|
||||
private static readonly long[] _masksE0_Uzp = new long[]
|
||||
{
|
||||
private static readonly long[] _masksE0_Uzp =
|
||||
[
|
||||
13L << 56 | 09L << 48 | 05L << 40 | 01L << 32 | 12L << 24 | 08L << 16 | 04L << 8 | 00L << 0,
|
||||
11L << 56 | 10L << 48 | 03L << 40 | 02L << 32 | 09L << 24 | 08L << 16 | 01L << 8 | 00L << 0,
|
||||
};
|
||||
11L << 56 | 10L << 48 | 03L << 40 | 02L << 32 | 09L << 24 | 08L << 16 | 01L << 8 | 00L << 0
|
||||
];
|
||||
|
||||
private static readonly long[] _masksE1_Uzp = new long[]
|
||||
{
|
||||
private static readonly long[] _masksE1_Uzp =
|
||||
[
|
||||
15L << 56 | 11L << 48 | 07L << 40 | 03L << 32 | 14L << 24 | 10L << 16 | 06L << 8 | 02L << 0,
|
||||
15L << 56 | 14L << 48 | 07L << 40 | 06L << 32 | 13L << 24 | 12L << 16 | 05L << 8 | 04L << 0,
|
||||
};
|
||||
15L << 56 | 14L << 48 | 07L << 40 | 06L << 32 | 13L << 24 | 12L << 16 | 05L << 8 | 04L << 0
|
||||
];
|
||||
#endregion
|
||||
|
||||
public static void Vmov_I(ArmEmitterContext context)
|
||||
|
|
|
@ -17,10 +17,10 @@ namespace ARMeilleure.Instructions
|
|||
static partial class InstEmit
|
||||
{
|
||||
#region "Masks"
|
||||
private static readonly long[] _masks_SliSri = new long[] // Replication masks.
|
||||
{
|
||||
0x0101010101010101L, 0x0001000100010001L, 0x0000000100000001L, 0x0000000000000001L,
|
||||
};
|
||||
private static readonly long[] _masks_SliSri =
|
||||
[
|
||||
0x0101010101010101L, 0x0001000100010001L, 0x0000000100000001L, 0x0000000000000001L
|
||||
];
|
||||
#endregion
|
||||
|
||||
public static void Rshrn_V(ArmEmitterContext context)
|
||||
|
|
|
@ -211,7 +211,7 @@ namespace ARMeilleure.Instructions
|
|||
return (ulong)(size - 1);
|
||||
}
|
||||
|
||||
private static ReadOnlySpan<byte> ClzNibbleTbl => new byte[] { 4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 };
|
||||
private static ReadOnlySpan<byte> ClzNibbleTbl => [4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0];
|
||||
|
||||
[UnmanagedCallersOnly]
|
||||
public static ulong CountLeadingZeros(ulong value, int size) // size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.).
|
||||
|
|
|
@ -27,7 +27,7 @@ namespace ARMeilleure.IntermediateRepresentation
|
|||
{
|
||||
get
|
||||
{
|
||||
_domFrontiers ??= new HashSet<BasicBlock>();
|
||||
_domFrontiers ??= [];
|
||||
|
||||
return _domFrontiers;
|
||||
}
|
||||
|
@ -38,7 +38,7 @@ namespace ARMeilleure.IntermediateRepresentation
|
|||
public BasicBlock(int index)
|
||||
{
|
||||
Operations = new IntrusiveList<Operation>();
|
||||
Predecessors = new List<BasicBlock>();
|
||||
Predecessors = [];
|
||||
|
||||
Index = index;
|
||||
}
|
||||
|
|
|
@ -198,7 +198,7 @@ namespace ARMeilleure.Signal
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
|
||||
OperandType[] argTypes = new OperandType[] { OperandType.I32, OperandType.I64, OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I32, OperandType.I64, OperandType.I64];
|
||||
|
||||
return Compiler.Compile(cfg, argTypes, OperandType.None, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Code;
|
||||
}
|
||||
|
@ -252,7 +252,7 @@ namespace ARMeilleure.Signal
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
|
||||
OperandType[] argTypes = new OperandType[] { OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64];
|
||||
|
||||
return Compiler.Compile(cfg, argTypes, OperandType.I32, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Code;
|
||||
}
|
||||
|
|
|
@ -30,7 +30,7 @@ namespace ARMeilleure.Signal
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
|
||||
OperandType[] argTypes = new OperandType[] { OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64];
|
||||
|
||||
return Compiler.Compile(cfg, argTypes, OperandType.I32, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Map<DebugPartialUnmap>();
|
||||
}
|
||||
|
@ -47,7 +47,7 @@ namespace ARMeilleure.Signal
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
|
||||
OperandType[] argTypes = new OperandType[] { OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64];
|
||||
|
||||
return Compiler.Compile(cfg, argTypes, OperandType.I32, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Map<DebugThreadLocalMapGetOrReserve>();
|
||||
}
|
||||
|
@ -76,7 +76,7 @@ namespace ARMeilleure.Signal
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
|
||||
OperandType[] argTypes = new OperandType[] { OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64];
|
||||
|
||||
return Compiler.Compile(cfg, argTypes, OperandType.None, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Map<DebugNativeWriteLoop>();
|
||||
}
|
||||
|
|
|
@ -55,7 +55,7 @@ namespace ARMeilleure.Translation
|
|||
public Aarch32Mode Mode { get; }
|
||||
|
||||
private int _ifThenBlockStateIndex = 0;
|
||||
private Condition[] _ifThenBlockState = Array.Empty<Condition>();
|
||||
private Condition[] _ifThenBlockState = [];
|
||||
public bool IsInIfThenBlock => _ifThenBlockStateIndex < _ifThenBlockState.Length;
|
||||
public Condition CurrentIfThenBlockCond => _ifThenBlockState[_ifThenBlockStateIndex];
|
||||
|
||||
|
|
|
@ -23,7 +23,7 @@ namespace ARMeilleure.Translation.Cache
|
|||
}
|
||||
}
|
||||
|
||||
private readonly List<MemoryBlock> _blocks = new();
|
||||
private readonly List<MemoryBlock> _blocks = [];
|
||||
|
||||
public CacheMemoryAllocator(int capacity)
|
||||
{
|
||||
|
|
|
@ -25,7 +25,7 @@ namespace ARMeilleure.Translation.Cache
|
|||
|
||||
private static CacheMemoryAllocator _cacheAllocator;
|
||||
|
||||
private static readonly List<CacheEntry> _cacheEntries = new();
|
||||
private static readonly List<CacheEntry> _cacheEntries = [];
|
||||
|
||||
private static readonly Lock _lock = new();
|
||||
private static bool _initialized;
|
||||
|
|
|
@ -6,8 +6,8 @@ namespace ARMeilleure.Translation.Cache
|
|||
{
|
||||
class JitCacheInvalidation
|
||||
{
|
||||
private static readonly int[] _invalidationCode = new int[]
|
||||
{
|
||||
private static readonly int[] _invalidationCode =
|
||||
[
|
||||
unchecked((int)0xd53b0022), // mrs x2, ctr_el0
|
||||
unchecked((int)0xd3504c44), // ubfx x4, x2, #16, #4
|
||||
unchecked((int)0x52800083), // mov w3, #0x4
|
||||
|
@ -35,8 +35,8 @@ namespace ARMeilleure.Translation.Cache
|
|||
unchecked((int)0x54ffffa8), // b.hi 54 <ic_clear_loop>
|
||||
unchecked((int)0xd5033b9f), // dsb ish
|
||||
unchecked((int)0xd5033fdf), // isb
|
||||
unchecked((int)0xd65f03c0), // ret
|
||||
};
|
||||
unchecked((int)0xd65f03c0) // ret
|
||||
];
|
||||
|
||||
private delegate void InvalidateCache(ulong start, ulong end);
|
||||
|
||||
|
|
|
@ -47,7 +47,7 @@ namespace ARMeilleure.Translation
|
|||
{
|
||||
RemoveUnreachableBlocks(Blocks);
|
||||
|
||||
HashSet<BasicBlock> visited = new();
|
||||
HashSet<BasicBlock> visited = [];
|
||||
Stack<BasicBlock> blockStack = new();
|
||||
|
||||
Array.Resize(ref _postOrderBlocks, Blocks.Count);
|
||||
|
@ -88,7 +88,7 @@ namespace ARMeilleure.Translation
|
|||
|
||||
private void RemoveUnreachableBlocks(IntrusiveList<BasicBlock> blocks)
|
||||
{
|
||||
HashSet<BasicBlock> visited = new();
|
||||
HashSet<BasicBlock> visited = [];
|
||||
Queue<BasicBlock> workQueue = new();
|
||||
|
||||
visited.Add(Entry);
|
||||
|
|
|
@ -108,7 +108,7 @@ namespace ARMeilleure.Translation
|
|||
/// <returns>A list of all values sorted by Key Order</returns>
|
||||
public List<TV> AsList()
|
||||
{
|
||||
List<TV> list = new();
|
||||
List<TV> list = [];
|
||||
|
||||
AddToList(_root, list);
|
||||
|
||||
|
|
|
@ -154,7 +154,7 @@ namespace ARMeilleure.Translation.PTC
|
|||
private void InitializeCarriers()
|
||||
{
|
||||
_infosStream = MemoryStreamManager.Shared.GetStream();
|
||||
_codesList = new List<byte[]>();
|
||||
_codesList = [];
|
||||
_relocsStream = MemoryStreamManager.Shared.GetStream();
|
||||
_unwindInfosStream = MemoryStreamManager.Shared.GetStream();
|
||||
}
|
||||
|
@ -765,7 +765,7 @@ namespace ARMeilleure.Translation.PTC
|
|||
|
||||
private void StubCode(int index)
|
||||
{
|
||||
_codesList[index] = Array.Empty<byte>();
|
||||
_codesList[index] = [];
|
||||
}
|
||||
|
||||
private void StubReloc(int relocEntriesCount)
|
||||
|
|
|
@ -50,7 +50,7 @@ namespace ARMeilleure.Translation.PTC
|
|||
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||||
public static List<T> DeserializeList<T>(Stream stream) where T : struct
|
||||
{
|
||||
List<T> list = new();
|
||||
List<T> list = [];
|
||||
|
||||
int count = DeserializeStructure<int>(stream);
|
||||
|
||||
|
|
|
@ -26,9 +26,10 @@ namespace ARMeilleure.Translation.PTC
|
|||
|
||||
private const uint InternalVersion = 5518; //! Not to be incremented manually for each change to the ARMeilleure project.
|
||||
|
||||
private static readonly uint[] _migrateInternalVersions = {
|
||||
1866,
|
||||
};
|
||||
private static readonly uint[] _migrateInternalVersions =
|
||||
[
|
||||
1866
|
||||
];
|
||||
|
||||
private const int SaveInterval = 30; // Seconds.
|
||||
|
||||
|
|
|
@ -260,7 +260,7 @@ namespace ARMeilleure.Translation
|
|||
Logger.EndPass(PassName.RegisterUsage);
|
||||
|
||||
OperandType retType = OperandType.I64;
|
||||
OperandType[] argTypes = new OperandType[] { OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64];
|
||||
|
||||
CompilerOptions options = highCq ? CompilerOptions.HighCq : CompilerOptions.None;
|
||||
|
||||
|
@ -478,7 +478,7 @@ namespace ARMeilleure.Translation
|
|||
|
||||
public void InvalidateJitCacheRegion(ulong address, ulong size)
|
||||
{
|
||||
ulong[] overlapAddresses = Array.Empty<ulong>();
|
||||
ulong[] overlapAddresses = [];
|
||||
|
||||
int overlapsCount = Functions.GetOverlaps(address, size, ref overlapAddresses);
|
||||
|
||||
|
|
|
@ -36,7 +36,7 @@ namespace ARMeilleure.Translation
|
|||
Sync = new object();
|
||||
|
||||
_requests = new Stack<RejitRequest>();
|
||||
_requestAddresses = new HashSet<ulong>();
|
||||
_requestAddresses = [];
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
|
|
|
@ -187,7 +187,7 @@ namespace ARMeilleure.Translation
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
OperandType retType = OperandType.I64;
|
||||
OperandType[] argTypes = new[] { OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64];
|
||||
|
||||
GuestFunction func = Compiler.Compile(cfg, argTypes, retType, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Map<GuestFunction>();
|
||||
|
||||
|
@ -212,7 +212,7 @@ namespace ARMeilleure.Translation
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
OperandType retType = OperandType.I64;
|
||||
OperandType[] argTypes = new[] { OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64];
|
||||
|
||||
GuestFunction func = Compiler.Compile(cfg, argTypes, retType, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Map<GuestFunction>();
|
||||
|
||||
|
@ -281,7 +281,7 @@ namespace ARMeilleure.Translation
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
OperandType retType = OperandType.None;
|
||||
OperandType[] argTypes = new[] { OperandType.I64, OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64, OperandType.I64];
|
||||
|
||||
return Compiler.Compile(cfg, argTypes, retType, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Map<DispatcherFunction>();
|
||||
}
|
||||
|
@ -305,7 +305,7 @@ namespace ARMeilleure.Translation
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
OperandType retType = OperandType.I64;
|
||||
OperandType[] argTypes = new[] { OperandType.I64, OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64, OperandType.I64];
|
||||
|
||||
return Compiler.Compile(cfg, argTypes, retType, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Map<WrapperFunction>();
|
||||
}
|
||||
|
|
|
@ -139,7 +139,7 @@ namespace ARMeilleure.Translation
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
|
||||
OperandType[] argTypes = new OperandType[] { OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64];
|
||||
|
||||
return Compiler.Compile(cfg, argTypes, OperandType.I32, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Map<FpFlagsPInvokeTest>();
|
||||
}
|
||||
|
|
Loading…
Add table
Reference in a new issue